1. Field of the Invention
The present invention relates to a mask ROM of redundant configuration provided with spare memory cells. The spare memory cells are formed on the same chip of mask ROM on which normal memory cells are formed. When some of the normal memory cells are found to be faulty, they are substituted with the spare memory cells. The invention particularly relates to spare memory cells that can form redundancy of the mask ROM with excellent productivity and with small occupying areas.
2. Description of the Prior Art
Rapid progresses of semiconductor technologies of recent years have prompted high integration and high function of semiconductor integrated circuits. Particularly, progresses in integration of semiconductor memory devices are remarkable.
If the surface area of a semiconductor chip is increased for the purpose of high integration, yield of the chip tends to decrease to deteriorate productivity. To solve this problem, redundant configuration is effective for, for instance, memories. The redundant configuration provides spare memory cells on a chip on which normal memory cells are formed. If some of the normal memory cells are found to be faulty, they are relieved by substituting them with the spare memory cells.
This kind of redundant configuration is conventionally employed in memory devices such as DRAMs (dynamic RAMs), SRAMs (static RAMs) and PROMs (programmable ROMs). However, the redundant configuration is generally not employed in mask ROMs. The reason of this will be explained.
A data writing process of the mask ROM is achieved during a wafer manufacturing stage. After the manufacturing, the mask ROM is tested for its electrical characteristics such as data read characteristics. In the testing, it is impossible to rewrite data already written in the mask ROM. Namely, even if some of normal memory cells of the manufactured mask ROM are found to be defective, it is impossible to write the same data stored in the defective normal memory cells to spare memory cells and to electrically switch the defective cells to the spare cells.
To relieve the defective normal memory cells of the mask ROM, it is necessary to provide spare memory cells to which data can be written even after the completion of manufacturing processes and which can hold the written data with no electrical supply. This sort of spare memory cells may be transistors provided with floating gates as those employed in PROMs, or memory cells provided with fuses.
However, manufacturing processes of the spare memory cells formed of transistors with floating gates are complicated, compared with manufacturing processes of MOS transistors of mask ROMs. This may unbearably increase manufacturing costs of the spare memory cells.
Meanwhile, the spare memory cells with fuses are classified into three types depending on ways of disconnecting the fuses to program data write.
A first type cuts off the fuses with laser. This type requires an exclusive cutting apparatus having a function of correctly aligning positions to be cut and, therefore, the fuses shall be spaced apart from each other by a certain distance that cannot be minimized. In addition, it takes a long time to align the cutting positions, and it is necessary to inspect electrical characteristics of the memory cells before and after cutting the fuses. This also takes a time. Namely, the first type needs a lot of processes in switching defective memory cells to the spare memory cells, thus deteriorating productivity.
A second type uses a current from a bipolar transistor to fuse a current fuse. The bipolar transistors involved in this second type require different manufacturing processes from manufacturing processes of MOS transistors of a mask ROM. This may complicate the manufacturing processes of mask ROMs and increase the number of processes and the manufacturing costs.
A third type connects a MOS transistor to a fuse in series and melts the fuse by an ON current from the MOS transistor. This third type does not require different manufacturing processes and exclusive facilities. However, to melt the fuse, it is necessary to provide a current of several 10 mA so that the MOS transistor shall have a very large channel width in the range of for instance, 0.5 to 1.0 .mu.m. This may increase an area occupied by the MOS transistor. Namely, a chip area shall be increased if many spare memory cells are going to be disposed on the chip.
To provide redundancy for mask ROMs, spare memory cells of the above-mentioned structures shall be arranged. However, these structures have drawbacks that they need different and complicated manufacturing processes, that they occupy large area on a chip, and that they deteriorate productivity. These are the reasons why the redundant configuration for faulty memory cells is not employed in the mask ROMs.